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In order to fabricate strained-Si MOSFETs,we present a method to prepare strained-Si material with highquality surface and ultra-thin SiGe virtual substrate.By sandwiching a low-temperature Si(LT-Si) layer between a Si buffer and a pseudomorphic Si_(0.8)Ge_(0.2) layer,the surface roughness root mean square(RMS) is 1.02 nm and the defect density is 10~6 cm~(-2) owing to the misfit dislocations restricted to the LT-Si layer and the threading dislocations suppressed from penetrating into the Si_(0.8)Ge_(0.2) layer.By employing P~+ implantation and rapid thermal annealing, the strain relaxation degree of the Si_(0.8)Ge_(0.2) layer increases from 85.09%to 96.41%and relaxation is more uniform. Meanwhile,the RMS(1.1nm) varies a little and the defect density varies little.According to the results,the method of combining an LT-Si layer with ion implantation can prepare high-quality strained-Si material with a high relaxation degree and ultra-thin SiGe virtual substrate to meet the requirements of device applications.
In order to fabricate strained-Si MOSFETs, we present a method to prepare strained-Si material with high quality surface and ultra-thin SiGe virtual substrate. By sandwiching a low-temperature Si (LT-Si) layer between a Si buffer and a pseudomorphic The surface roughness root mean square (RMS) is 1.02 nm and the defect density is 10 ~ 6 cm -2 due to the misfit dislocations restricted to the LT-Si layer and the (0.2) layer.By employing P ~ + implantation and rapid thermal annealing, the strain relaxation degree of the Si_ (0.8) Ge_ (0.2) layer increases from 85.09% to 96.41% (1.1 nm) varies a little and the defect density varies little. Acording to the results, the method of combining an LT-Si layer with ion implantation can prepare high-quality strained-Si material with a high relaxation degree and ultra-thin SiGe virtual substrate to meet the requirements of device applications.