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本文介绍了直接数字频率合成技术(Direct Digital Frequency Synthesizer,简称DDS)的原理和特点。研究了用FPGA实现DDS的设计方法,给出了为提高芯片运算速度而采用的并行进位加法器、流水线架构的优化方法,采用了线性插值查表法实现DDS的方案。给出了采用ALTERA公司的Cyclone系列FPGA芯片EP1C6144C8进行直接数字频率合成的波形仿真图。简述了程序逻辑运算过程中产生毛刺的原因,并提出消除毛刺的四种方法。
This article describes the principles and features of Direct Digital Frequency Synthesizer (DDS). The design method of DDS using FPGA is studied. The parallel adder and pipelined architecture optimized to improve the speed of the chip are given, and the linear interpolation look - up table method is used to realize DDS. The waveform simulation diagram of direct digital frequency synthesis is given by EP1C6144C8 of ALTERA Cyclone series FPGA chip. The reasons of glitches in the process of program logic are briefly described, and four methods of eliminating glitches are proposed.