硅基Ⅲ-Ⅴ族纳米线晶体管已经成为高速、低功耗纳米级器件的重要发展方向。首先,从气相-液相-固相生长和选择区域生长的角度,阐明了在硅衬底上无位错生长高晶体质量Ⅲ-Ⅴ族纳米线的机制。在此基础上,介绍了垂直结构和水平结构Ⅲ-Ⅴ族纳米线晶体管的制备方法。研究表明,垂直结构纳米线容易实现高密度生长,而水平结构纳米线有利于逻辑栅的制作。通过比较垂直生长、水平生长、衬底转移和自上而下纳米加工技术制备Ⅲ-Ⅴ族纳米线的工艺优缺点,为水平结构Ⅲ-Ⅴ族纳米线在硅衬底上的大面积异构集成及其器件的制作提供了新的解决方案。 Silicon-based III-V nanowire transistors have become an important development direction for high-speed, low-power nanoscale devices. First of all, the mechanism of dislocation-free growth of III-V nanowires with high crystal quality on silicon substrates is demonstrated from the viewpoint of gas-liquid-solid-phase growth and selective region growth. On this basis, the preparation method of III-V nanowire transistors with vertical structure and horizontal structure is introduced. Studies have shown that vertical structure of nanowires easy to achieve high-density growth, and horizontal structure of nanowires conducive to the production of logic gate. The advantages and disadvantages of III-V nanowires prepared by vertical growth, horizontal growth, substrate transfer and top-down nanofabrication techniques are the advantages of large-area isomerism of horizontal structure III-V nanowires on silicon substrates Integration and production of devices to provide a new solution.