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介绍神经网络ＶＬＳＩ硬件实现的基本情况和电路原理图与ＶＨＯＬ混合设计方法的概念，在此基础上利用单片ＦＰＣＡ设计出了白６４个神经元组成的具有片内学习功能的三层ＥＢＰ神经网络电路，其学习速度达到每秒三千万次以上连接权值的修正，并对其工作过程进行了较详细的分析，指出了制造ＡＳＩＣ芯片时应做的改进。
This paper introduces the basic situation of VLSI hardware implementation of neural network and the concept of circuit schematic and VHOL hybrid design method. Based on this, a three-layer EBP neural network with on-chip learning function composed of white 64 neurons is designed by using single-chip FPCA Circuit, its learning speed of more than 30 million times per second to amend the connection weights, and its work process were analyzed in more detail, pointed out that the manufacture of ASIC chips should be improved.