当芯片设计进入深亚微米,串扰效应引起大量的设计违规,尤其是对时序收敛产生很大的影响。实际上串扰对电路时序性能的影响非常难估计,它不仅取决于电路互联拓扑,而且还取决于连线上信号的动态特征。文章从串扰延时的产生原因开始分析,并提出了在0.18ΜM及以下工艺条件下对串扰延时进行预防,分析和修复的时序收敛方法。 When the chip design enters deep submicron, crosstalk effects cause a large number of design violations, especially for timing closure. In fact, the influence of crosstalk on the circuit timing performance is very difficult to estimate. It depends not only on the circuit interconnection topology, but also on the dynamic characteristics of the signal on the connection. The article begins with the analysis of the cause of crosstalk delay, and proposes the timing closure method of preventing, analyzing and repairing the crosstalk delay under the condition of 0.18MM and below.