论文部分内容阅读
提供了一种基于FPGA实现PCI总线目标模块接口控制器的设计方案,总线访问操作复杂的时序用时序状态机来实现,给出了PCI总线配置空间的设计以及PCI接口控制器中时序状态的实现。
A design scheme of PCI bus target module interface controller based on FPGA is provided. The timing of bus access operation is realized by using timing state machine. The design of PCI bus configuration space and the realization of the timing state in PCI interface controller are given .