在性能无论如何都占据主导地位的巨型机领域内,为了达到超过200MIPS的吞吐能力,各厂商都在体系结构方面采取了一些技巧,如超标量指令流水线、64位数据和128位指令通道以及其他一些特性.现在,最新一批RISC微处理器正在采用这些技巧,预示着新一代高性能工作站和服务器即将问世.在10月8日和19日于加州举行的“微处理器研讨会”上,所有主要的CPU供应商都展示了这些RISC处理器设计的发展情况. In the area of ​​supercomputers where performance is dominant anyway, vendors have taken architectural tricks to achieve throughput of more than 200 MIPS, such as superscalar instruction pipelines, 64-bit data and 128-bit instruction lanes, and others Some of these features are now being adopted by the latest batch of RISC microprocessors, signaling the coming of a new generation of high-performance workstations and servers.At the “Microprocessor Symposium” in California on October 8 and 19, All major CPU vendors have demonstrated how these RISC processor designs evolve.