本文提出了一个基于Ｈｏｐｆｉｅｌｄ网络的ＶＬＳＩ／ＰＣＢ多层布线中的有约束通孔最小化方法。在线段交叠图模型的基础上，提出了相邻矩阵、交叠矩阵、定层矩阵等概念，利用换位矩阵，将问题映射为相应的神经网络，并构造了该问题的能量函数，从而解决了多层布线的分层及通孔最小化题。新算法还解决了多层布线分层的管脚约束问题和相邻约束问题‘实验结果表明，这是一种有效的方法 This paper presents a constrained through-hole minimization approach in VLSI / PCB multilayer routing based on Hopfield networks. Based on the overlap graph model of line segments, the conceptions of adjacency matrix, overlap matrix and fixed layer matrix are proposed. By using the transposition matrix, the problem is mapped to the corresponding neural network and the energy function of the problem is constructed. Solve the multi-layer wiring layer and the hole minimization problem. The new algorithm also solves the problem of pinning constraints and adjacent constraints in multi-layer routing. Experimental results show that this is an effective method