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针对PAL_D制式模拟视频信号的特点,设计并实现了一套基于FPGA的视频记录系统。该系统使用FPGA作为主控,通过RS232串口接收外部指令,控制AD将模拟信号转换为数字信号,数据解析后,使用乒乓操作,利用SDRAM缓存将数据存入FLASH中,记录结束后使用网络接口将数据导出。实验证明,该系统能够准确的完成PAL_D制式的视频记录任务。
Aiming at the characteristics of PAL_D analog video signals, a set of FPGA-based video recording system is designed and realized. The system uses FPGA as the master, receives external commands through RS232 serial port, controls AD to convert analog signals into digital signals, uses ping-pong operation after data analysis, and uses the SDRAM cache to store the data in FLASH. After recording, Data output. Experimental results show that the system can accurately complete the PAL_D standard video recording tasks.