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本文研究了CMOS集成电路在1.5MeV电子辐照下p沟MOS晶体管感生阈电压偏移与辐照期间栅偏条件的关系。在不同器件中导致阈电压负偏最大的辐照偏置,有导通与截止两种。通过研究两种代表性工艺的n型硅MOS电容,在不同偏置辐照后的辐射感生平带电压、开启电压和界面态的变化,揭示了导致p沟MOS晶体管存在两种最劣辐照偏置的机制。
In this paper, the relationship between the induced threshold voltage shift of p-channel MOS transistors and the gate bias conditions during the irradiation of 1.5MeV electrons in a CMOS integrated circuit is investigated. In different devices lead to the threshold voltage negative bias bias radiation, there are two kinds of on and off. By studying the n-type silicon MOS capacitances of the two representative processes, the variations of the radiation-induced flat-band voltage, turn-on voltage and interface state after different bias exposures revealed that there are two kinds of worst radiations Bias mechanism.