跳频通信系统中频率合成器的频率转换速率直接影响到系统的抗干扰能力。文章对锁相环频率合成器的锁定时间进行了分析与仿真,介绍了各种途径频率转换快速锁定的解决方案,采用其中的基于DDS分数分频的锁相环频合器方案,实现了S波段宽带跳频频合器测试,结果表明:在频率间隔为500MHz时,相位锁定时间为110μs,且相噪低、频谱纯度高,可大大提升系统性能。 The frequency conversion rate of the frequency synthesizer in the frequency hopping communication system directly affects the anti-interference ability of the system. The article analyzes and simulates the locking time of the PLL frequency synthesizer, and introduces the solutions of various methods of frequency fast switching. By using the PLL frequency-divider scheme based on DDS fractional frequency division, the S Band wideband hopping frequency hopper test. The results show that the phase locking time is 110μs at 500MHz frequency, and the phase noise is low and the spectrum purity is high, which can greatly improve the system performance.