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针对北斗二代B1频点信号比特翻转频繁的问题,设计并实现了基于FPGA的北斗B1频点导航接收机基带处理器。该处理器在信号捕获过程中设计了频率精细搜索的精捕获算法,避免了假捕获并且提高了捕获频率的精度:在载波跟踪环路中设计2阶锁频环辅助3阶锁相环的方案,以提高环路跟踪的动态性能。其中,锁频环和锁相环均设计了对比特翻转敏感的鉴别器,保证环路跟踪的准确性。试验结果表明,该基带处理器设计具有较高精度的捕获频率和良好的高动态跟踪能力。
Aiming at the frequent bit reversal of the B1 frequency signal in Beidou II, a Beidou B1 frequency point navigation receiver baseband processor based on FPGA is designed and implemented. In the process of signal acquisition, the processor designs a fine acquisition algorithm of frequency fine search to avoid fake capture and improve the accuracy of the acquisition frequency. The scheme of designing a second order frequency-locked loop auxiliary third-order phase-locked loop in a carrier tracking loop , To improve the dynamic performance of loop tracking. Among them, the frequency locked loop and phase-locked loop are designed to bit flip sensitive discriminator to ensure the accuracy of the loop tracking. The experimental results show that the baseband processor design has a higher accuracy of the capture frequency and good high dynamic tracking capability.