过去的十年里,无线基站设计者们在努力降低成本、功耗和占板空间方面已经取得了巨大进展。对于这些设计者来说,3G基站开发的目的非常明确,以十分之一的成本实现十倍的带宽。处理基带算法所需的处理能力随着新的无线协议的出现正在不断增加。传统数字信号处理器(DSP)的速度无法实现基带处理,因此需要硬件加速来补充DSP。一个典型架构可能由一系列的数字信号处理器和基带卡上的硬件加速器模块构成,这里需要多通道处理。 Over the past decade, wireless base station designers have made great strides in their efforts to reduce costs, power consumption and board space. For these designers, the purpose of 3G base station development is very clear, with a one-tenth cost to achieve ten times the bandwidth. The processing power required to handle baseband algorithms is on the rise as new wireless protocols emerge. The speed of traditional digital signal processor (DSP) can not realize the baseband processing, so hardware acceleration is needed to supplement DSP. A typical architecture may consist of a series of digital signal processors and hardware accelerator modules on a baseband card that require multi-channel processing.