采用等离子体浸没离子注入(PⅢ)技术,通过SiF_4预非晶化后进行BF_3掺杂制作了亚100nmP~+/n结。这种方法的掺杂率可高达10~(16)/cm~2·s。硅片浸没在SiF_4或BF_3等离子体中并加负偏压。带正电的离子由等离子体层内的电场加速后注入到硅片中。改变加在硅片支座上的负压及热退火的条件就可控制结深。 Sub-100nmP ~ + / n junctions were fabricated by plasma immersion ion implantation (PⅢ) and pre-amorphization of SiF_4 followed by BF_3 doping. The doping rate of this method can be as high as 10 ~ (16) / cm ~ 2 · s. The wafer is immersed in a SiF 4 or BF 3 plasma and negatively biased. The positively charged ions are accelerated into the silicon wafer by the electric field in the plasma layer. Change the addition of negative pressure on the wafer holder and thermal annealing conditions can be controlled junction depth.