论文部分内容阅读
为实现高集成密度、高产量和短制造周期,发展了一种新的双层迭式LSI 制造工艺.称作初级纵向集成电路(ELVIC)技术工艺是把两个用常规方法制造的LSI 芯片面对面放置并热压在一起.此工艺还包括上下两层LSI 纵向互连(VI)的形成、上下两层表面的平整化和使用热压方法的中间层连接.本实验中,在5×5mm~2的芯片上,约有52000个10×10μm~2的金-钛纵向互连.测量得知,每对VI 点的拉伸强度为4mg 力.已制造出由上层p 沟和下层n 沟MOSFET 组成的两层31级体硅CMOS 环形振荡器.在电源电压为5V 时,每级的传输延迟时间为1.86ns.
In order to achieve high integration density, high throughput and short manufacturing cycle, a new dual-layer stacked LSI manufacturing process has been developed called the primary vertical integrated circuit (ELVIC) technology process is to manufacture two conventional LSI chips face to face Placed and hot pressed together.This process also includes the upper and lower two layers of LSI vertical interconnection (VI) formation, the upper and lower surface smoothing and the intermediate layer using hot pressing method connection.In this experiment, 5 × 5mm ~ 2 chips, there are approximately 52,000 gold-titanium longitudinal interconnects of 10 x 10 μm to 2. It has been measured that the tensile strength of each pair of points VI is 4 mg.A series of p-type and n-type MOSFETs Composed of two 31-level bulk silicon CMOS ring oscillator at the power supply voltage of 5V, the transmission delay of each stage 1.86ns.