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This paper describes a low-pass reconfigurable baseband filter for GSM,TD-SCDMA and WCDMA multi-mode transmitters.To comply with 3GPP emission mask and limit TX leakage at the RX band,the out-of -band noise performance is optimized.Due to the distortion caused by the subthreshold leakage current of the switches used in capacitor array,a capacitor bypass technique is proposed to improve the filter’s linearity.An automatic frequency tuning circuit is adopted to compensate the cut-off frequency variation.Simulation results show that the filter achieves an in-band input-referred third-order intercept point(IIP3) of 47 dBm at 1.2-V power supply and the out-of-band noise can meet TX SAW-less requirement for WCDMA & TD-SCDMA.The baseband filter incorporates -40 to 0 dB programmable gain control that is accurately variable in 0.5 dB steps.The filter’s cut-off frequency can be reconfigured for GSM/TD-SCDMAAVCDMA multi-mode transmitter.The implemented baseband filter draws 3.6 mA from a 1.2-V supply in a 0.13μm CMOS process.
This paper describes a low-pass reconfigurable baseband filter for GSM, TD-SCDMA and WCDMA multi-mode transmitters. To comply with 3GPP emission mask and limit TX leakage at the RX band, the out-of-band noise performance is optimized. Due to the distortion caused by the subthreshold leakage current of the switches used in capacitor array, a capacitor bypass technique is proposed to improve the filter’s linearity. An automatic frequency tuning circuit is adopted to compensate the cut-off frequency variation. Simulation results show that the filter achieves an in-band input-referred third-order intercept point (IIP3) of 47 dBm at 1.2-V power supply and the out-of-band noise can meet TX SAW-less requirement for WCDMA & TD-SCDMA.The baseband filter incorporates -40 to 0 dB programmable gain control that is accurately variable in 0.5 dB steps. The filter’s cut-off frequency can be reconfigured for GSM / TD-SCDMAAVCDMA multi-mode transmitter. implemented baseband filter draws 3.6 mA from a 1.2- V su pply in a 0.13μm CMOS process.