富士通研究所、美国富士通研究所、富士通公司共同开发出了采用ＳＯＩ基板的低功耗高速逻辑电路技术。该技术将用于作为ＣＰＵ等重要部分的 32位加法器中 ,与原来的ＣＬＡ加法器相比较 ,功耗约减少一半 ,因此已确认达到了与原来产品同样的工作速度。该新技术是通过低振幅驱动电 Fujitsu Research Institute, the Fujitsu Institute of the United States, Fujitsu Limited jointly developed using low-power SOI substrate high-speed logic circuit technology. The technology, which will be used in a 32-bit adder, which is an important part of the CPU and so on, consumes about 50% less power than the original CLA adder, so it has been confirmed that it achieves the same operating speed as the original product. The new technology is driven by low amplitude drive