This paper presents a CRC (Cyclic Redundancy Check)-aided turbo equalization approach to reduce the computational complexity. In this approach, CRC code bits are padded to the end of each transmit block, and a cyclic redundancy check is performed after decoding each block at the receiver end. If the check sum is zero, which means the receive block is correct, the corresponding LLRs (Log Likelihood Ratios) of this block are set high reliable values, and all the computations corresponding to this block can be cancelled for the subsequent outer iterations. With a lower computational complexity the proposed approach can achieve the same as or even better performance than the conventional non-CRC method.