论文部分内容阅读
Altera公司发布Quartus Ⅱ软件Arria 10版v14.0——先进的20nm FPGA和SoC设计环境。客户可以使用这一最新版软件所包含的全系列20nm优化IP内核,进一步加速其Arria 10FPGA和SoC设计。Quartus Ⅱ软件Arria 10版v14.0编译时间显著缩短。利用这一效能优势,客户缩短了设计迭代,20nm设计迅速达到时序收敛。这一最新版软件包括了全套的20nm优化IP内核,从而缩短了设计周期。系列IP包括标准协议和存储器接口、DSP和SoC IP内核。Altera还针对Arria 10FPGA和SoC,优化了其流行的IP内核,包括100G以太网、300GInterlaken,Interlaken旁视以及
Altera Corporation Releases Quartus II Software Arria 10 Version v14.0 - Advanced 20nm FPGA and SoC Design Environment. Customers can further accelerate their Arria 10 FPGA and SoC designs with the full range of 20 nm optimized IP cores included in this latest version of the software. Quartus Ⅱ software Arria 10 version v14.0 compile time is significantly shortened. Taking advantage of this performance benefit, customers shorten design iterations and 20nm designs quickly achieve timing closure. This latest version of the software includes a full set of 20nm optimized IP core, thus shortening the design cycle. Series IP includes standard protocol and memory interfaces, DSP and SoC IP cores. Altera also optimized its popular IP cores for Arria 10 FPGAs and SoCs, including 100G Ethernet, 300G Interlaken, Interlaken Look-Ahead, and