论文部分内容阅读
文章以嵌入式和数据采集技术为基础,研究设计并实现了基于ARM+FPGA体系架构面向高速实时数据采集应用的一种实用新型智能控制器。本文阐述了主处理器ARM最小系统、协处理器FPGA最小系统和ARM与FPGA通信接口等硬件系统技术的实现,以及Linux FPGA字符设备驱动程序开发、协处理器FPGA控制程序和主处理器ARM应用程序设计。智能控制器运用FPGA并行运算处理结构的优势,控制ADC进行高速数据采集。FPGA还可配置成软核处理器-Nios II嵌入式处理器,与ARM构成双核处理器系统。智能控制器通过ARM实现对FPGA的管理控制、实时数据采集和丰富外围接口的通信。
Based on embedded and data acquisition technology, the article researches and designs a new type of intelligent controller based on ARM + FPGA architecture for high speed real-time data acquisition. This article describes the main processor ARM minimum system, the smallest system of coprocessor FPGA and ARM and FPGA communication interface and other hardware system technology implementation, as well as Linux FPGA character device driver development, coprocessor FPGA control program and the main processor ARM application programming. The intelligent controller uses the advantages of FPGA parallel computing processing structure to control the ADC for high-speed data acquisition. The FPGA can also be configured as a soft-core processor, a Nios II embedded processor, and a dual-core processor system with ARM. The intelligent controller realizes the management control of FPGA through FPGA, the real-time data acquisition and the communication of rich peripheral interface.