本文介绍了一种适用于ＶＤＭＯＳ功率集成电路的双扩散ｐ阱ｎＭＯＳ器件新结构，该结构具有与ＶＤＭＯＳ工艺完全兼容和加工工艺简单的特点。利用这种结构可实现ｎＭＯＳ处理电路与衬底间的ｐｎ结隔离，并且隔离电压接近ＶＤＭＯＳ管的耐压。通过调节源、漏扩散窗口间距，可以在小范围内调整ｎＭＯＳ管的阈值电压。这种双扩散ｎＭＯＳ器件结构，特别适合于制作单驱动器件的ＭＯＳ功率集成电路。 This paper presents a new structure of a dual-diffused p-well nMOS device suitable for VDMOS power ICs that is fully compatible with the VDMOS process and has a simple manufacturing process. With this structure, pn junction isolation between the nMOS processing circuit and the substrate can be achieved and the isolation voltage is close to that of the VDMOS tube. By adjusting the source and drain diffusion window spacing, nMOS tube threshold voltage can be adjusted within a small area. This dual-diffused nMOS device architecture is ideal for MOS power ICs fabricated as single-drive devices.