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随着各种混合信号电路的性能和集成度的迅速提高以及对电路模块和元器件小型化的需要,集成无源技术成为一种取代分立无源器件以达到小型化的解决方案。鉴于电容器被广泛用于滤波、调谐和电源回路退耦等各种板级集成封装中,采用Si MEMS工艺,在半导体表面深刻蚀三维(3D)图形以增大有效表面积,制作了一种高电容密度的半导体pn结退耦电容器,并分析研究了其主要制成工艺和性能。结果显示,所制作的电容器的电容密度达8～12nF/mm2,相比无表面三维刻蚀图形的半导体电容器电容密度增大了10倍以上,退耦频率范围为10kHz～3.2GHz,可用于中低频率较大范围内的退耦。
With the rapid increase in performance and integration of various mixed signal circuits and the need for miniaturization of circuit modules and components, integrated passive technology has become a solution to replace discrete passive components to achieve miniaturization. In view of the widespread use of capacitors in various board-level integrated packages, such as filtering, tuning and power supply loop decoupling, Si MEMS processes are used to etch deep three-dimensional (3D) patterns on the semiconductor surface to increase effective surface area to create a high capacitance Density semiconductor pn junction decoupling capacitor, and analyzed its main manufacturing process and performance. The results show that the capacitance of the fabricated capacitor is 8 ~ 12nF / mm2, the capacitance of the semiconductor capacitor with no surface three-dimensional etching pattern is increased more than 10 times, and the decoupling frequency range is 10kHz ~ 3.2GHz. Decoupling in a wide range of low frequencies.