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提出了一种新型自对准石墨烯场效应晶体管(graphere field-effect transistor,GFET)制备工艺,该工艺可与现有Si CMOS工艺相兼容。利用该工艺制备的自对准栅GFET器件可以消除传统GFET器件制备过程中存在的栅极与漏极和源极覆盖区的寄生电容或栅极与源极和漏极暴露区的寄生电阻,使器件直流特性得到了很大改善。对制作的样品进行直流I-V特性测试时,清楚地观测到了双极型导电特性。制作的沟道长度为1μm的自对准GFET器件样品最大跨导gm为2.4μS/μm,提取的电子与空穴的本征场效应迁移率μeeff和μheff分别为6 924和7 035 cm2/(V·s),顶栅电压VTG为±30 V时,器件的开关电流比Ion/Ioff约为50,远大于目前已报道的最大GFET开关电流比。
A novel self-aligned graphene-field-effect transistor (GFET) fabrication process is proposed, which is compatible with the existing Si CMOS process. The self-aligned gate GFET device prepared by the process can eliminate the parasitic capacitance of the gate and drain and source coverage areas or the parasitic resistance of the gate and source and drain exposure areas existing during the preparation of the conventional GFET device, DC characteristics of the device has been greatly improved. Bipolar conductivity characteristics were clearly observed when the DC I-V characteristics of the fabricated samples were tested. The maximum transconductance gm of the self-aligned GFET device with a channel length of 1μm was 2.4μS / μm. The intrinsic field-effect mobility μeeff and μheff of extracted electrons and holes were 6 924 and 7 035 cm2 / ( V · s). When the top gate voltage VTG is ± 30 V, the switching current ratio of the device is about 50, which is much larger than the maximum current-to-GFET switch current ratio reported so far.