介绍了一种基于数学优化并采用设计方程评估电路性能的 CMOS单元模拟电路的自动综合技术。它采用一种新颖的“纹波推进法”来确定电路的静态工作点 ,并用较高精度的小尺寸MOS器件评估器求解 MOS器件的电学参数。利用本方法实现的几种 CMOS单元电路的自动综合程序已经集成到复旦模拟电路自动化设计系统 ( FDAADS)中 An automatic synthesis technique for CMOS cell analog circuits based on mathematical optimization and evaluation of circuit performance using design equations is presented. It uses a novel “ripple propulsion method” to determine the static operating point of the circuit, and use a high-precision small-scale MOS device evaluator to solve the electrical parameters of the MOS device. Automated synthesis of several CMOS cell circuits implemented using this method has been integrated into the FADD analog design automation system (FDAADS)