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D类放大器的输出级晶体管始终工作在开关模式,效率很高,在便携式电子领域得到广泛应用。采用CSMC 0.5μm BCD工艺,设计了一款应用于大功率D类放大器的低压差线性稳压器,对其结构和工作原理进行分析,重点讨论了各个关键电路模块的设计,改善了电源抑制比和启动时间。LDO的PSRR为100 dB@1 kHz,启动时间18μs,负载能力225 mA,工作电压范围5.5~18 V,最小压差0.5 V,温度系数54×10-6/℃。
Class D amplifier output stage transistor always work in the switch mode, high efficiency, widely used in the field of portable electronics. Using CSMC 0.5μm BCD process, a low dropout linear regulator for high power class D amplifier is designed and its structure and working principle are analyzed. The design of each key circuit module is mainly discussed, and the power supply rejection ratio And start-up time. The LDR has a PSRR of 100 dB @ 1 kHz, a start-up time of 18 μs, a load capacity of 225 mA, an operating voltage range of 5.5-18 V, a minimum voltage drop of 0.5 V and a temperature coefficient of 54 × 10 -6 / ° C.