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随着3G的到来,通信系统及通信行业产生了很大的变化,TD-SCDMA作为3G标准之一已开始应用,这使中国在3G发展中有了更多的话语权,一方面可以大幅降低设备的价格,另一方面具有国家安全战略意义。为发展TD-SCDMA,需要发展全线的TD产业链,其中射频芯片是一个重要的瓶颈。在TD-SCDMA系统收发信机设计中,将采用零中频结构,这就要求本振信号的频率与系统射频频率相同。所以片上锁相环的设计非常关键。本文研究的就是在锁相环反馈电路上的动态分频器,部分器件工作在GHz以上,整个分频器可以实现射频条件下小数分频。
With the arrival of 3G, great changes have taken place in the communication system and communication industry. As one of the 3G standards, TD-SCDMA has begun to be applied, which has given China more voice in the development of 3G and can drastically reduce The price of equipment, on the other hand, has the strategic significance of national security. In order to develop TD-SCDMA, it is necessary to develop a full range of TD industrial chain, of which RF chip is an important bottleneck. In TD-SCDMA system transceiver design, will use zero IF structure, which requires the frequency of the local oscillator signal and the system RF frequency. So the design of on-chip PLL is very crucial. In this paper, we study the dynamic divider in the PLL feedback circuit, some of the devices work at above GHz, and the whole divider can realize the fractional frequency division under the RF condition.