引言现有的休斯飞机公司的互补金属氧化物半导体(CMOS)工艺具有良好的低功率性能和生产大规模集成电路的能力。然而,与p型MOS芯片相比,现有的CMOS芯片的器件密度十分低。这就限制了电路的尺寸。但此电路能经济地用CMOS LSI加以补偿。目前,CMOS芯片的低器件密度主要是由于在芯片的一个区域内所有的n沟晶体管都制作在同一个区内,而所有的p沟晶体管全制作在芯片的其余区域内。因此,大 INTRODUCTION The current CMOS technology of Hughes Aircraft Corporation has good low-power performance and the ability to produce large scale integrated circuits. However, compared with the p-type MOS chip, the existing CMOS chip device density is very low. This limits the size of the circuit. However, this circuit can be economically compensated by CMOS LSI. At present, the low device density of CMOS chips is mainly because all the n-channel transistors in a region of the chip are fabricated in the same region, and all the p-channel transistors are fabricated in the rest of the chip. So big