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为避免金属掩膜易引起的微掩膜,本文采用SiO2介质作为掩膜,SF6/O2/Ar作为刻蚀气体,利用感应耦合等离子体刻蚀(ICP)技术对4H-SiC trench MOSFET栅槽刻蚀工艺进行了研究。本文详细研究了ICP刻蚀的不同工艺参数对刻蚀速率、刻蚀选择比以及刻蚀形貌的影响。实验结果表明:SiC刻蚀速率随着ICP功率和RF偏压功率的增大而增加;随着气体压强的增大刻蚀选择比降低;而随着氧气含量的提高,不仅刻蚀选择比增大,而且能够有效地消除微沟槽效应。刻蚀栅槽形貌和表面粗糙度分别通过扫描电子显微镜和原子力显微镜进行表征,获得了优化的栅槽结构,RMS表面粗糙度<0.4nm。
In order to avoid the metal mask easy to cause the micro-mask, this paper uses SiO2 as a mask, SF6 / O2 / Ar as an etching gas, using inductively coupled plasma (ICP) Erosion process was studied. This paper examines in detail the influence of different process parameters of ICP etching on the etching rate, etching selectivity, and etching morphology. The experimental results show that the etching rate of SiC increases with the increase of ICP power and RF bias power, and the selectivity of etching decreases with the increase of gas pressure. With the increase of oxygen content, Large, and can effectively eliminate the micro-groove effect. The morphology and surface roughness of the etched grooves were characterized by means of scanning electron microscope and atomic force microscope, respectively. The optimized gate structure was obtained. The RMS surface roughness was less than 0.4 nm.