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该文针对具有柔性结构的SoC总线测试系统,将面向TAM总线的测试时间与测试功耗优化问题转化为SoC测试矩形排样问题,并针对SoC测试的具体情况,提出了时间区间-空闲带宽排样算法和双矩形排样算法.同时,利用单亲遗传算法将SoC测试矩形排样问题转化为排列问题,并用时间区间-空闲带宽排样算法和双矩形排样算法将排列转化为相应的排样图,之后将单亲遗传算法应用到SoC测试矩形排样问题中,解决了测试时间与测试功耗协同优化问题.“,”Convert the optimization problem of test time and test power of TAM bus to rectangle packing problem based on the flexible structure of the SoC bus test system. Propose the 'time intervalspare bandwidth' layout algorithm and dual-rectangle layout algorithm. By the Parthenon-genetic algorithm, convert the layout problem to rank which is translated to the corresponding layout diagram using the 'time intervalspare bandwidth' packing algorithm and dual-rectangle packing algorithm. The optimization problem of the test time and test power is resolved.