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为满足并行调试需要,时钟模型必须既能保证事件之间的逻辑顺序,又能为性能调试提供时间戳。现有的基于事件的物理时钟同步算法在时间戳上可能存在较大误差,为了降低误差,对现有算法进行改进。改进的算法依次对时钟偏移误差最大的局部时钟进行调整,调整的依据是两个节点之间消息的发送和接收具有对等性,调整的时候考虑了该进程和其它所有进程之间的通信传输。模拟结果表明:该算法以较小的时间代价,减少了90%左右的误差。该算法可以解决并行调试环境中的时钟同步问题。
To meet the needs of parallel debugging, the clock model must not only ensure the logical order of events, but also provide timestamping for performance tuning. The existing event-based physical clock synchronization algorithm may have a big error in the timestamp. In order to reduce the error, the existing algorithm is improved. The improved algorithm sequentially adjusts the local clock with the largest error of clock offset according to the equivalence between the sending and receiving of messages between the two nodes. The adjustment takes into account the communication between the process and all other processes transmission. The simulation results show that this algorithm reduces the error by about 90% with a little time cost. This algorithm can solve the problem of clock synchronization in parallel debugging environment.