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对一种具有倾斜表面漂移区SOI LDMOS的制造方法进行了研究,提出采用多窗口LOCOS法形成倾斜表面漂移区的新技术;建立了倾斜表面轮廓函数的数学模型,并开发了用于优化窗口尺寸和位置的计算机程序。TCAD 2-D工艺仿真验证了该技术的可行性。设计了漂移区长度约为15μm的SOI LDMOS。数值仿真结果表明,与RESURF结构器件相比较,其漂移区电场近似为理想的常数分布,并且击穿电压提高约8%,漂移区浓度提高约127%。由此可见,VLT是一种理想的横向耐压技术。
A method of manufacturing SOI LDMOS with inclined surface drift region was studied. A new technology of forming multi-window LOCOS drift region was put forward. A mathematical model of inclined surface profile function was established, and a method for optimizing window size And location of the computer program. TCAD 2-D process simulation to verify the feasibility of the technology. The SOI LDMOS with a drift region length of about 15μm was designed. The numerical simulation results show that the electric field in the drift region is approximately the ideal constant distribution compared with the RESURF structure device, and the breakdown voltage is increased by about 8% and the drift region concentration is increased by about 127%. This shows that VLT is an ideal lateral withstand voltage technology.