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,Multi-stage dual replica bit-line delay technique for process-variation-robust timing of low voltag
[期刊论文] 作者:,Zheng-ping LI,You-wu TAO,Jun-ning CHEN,
来源:浙江大学学报(英文版)(C辑:计算机与电子) 年份:2015
A multi-stage dual replica bit-line delay (MDRBD) technique is proposed for reducing access time by suppressing the sense-amplifier enable (SAE) timing variatio...
[期刊论文] 作者:Shou-biao TAN,Wen-juan LU,Chun-yu PENG,Zheng-ping LI,You-wu TAO,Jun-ning CHEN,,
来源:Frontiers of Information Technology & Electronic Engineering 年份:2015
目的:针对低电压下传统SRAM灵敏放大器控制时序受工艺、温度变化而引起的较大的控制时序的波动,设计一种基于多级双复制位线延迟技术的控制时序产生电路。创新点:同时采用多...
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