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论文基于高频阻抗和瞬间能量传递分析印制电路板(PCB)去耦网络,指出常规设计方法不能使得去耦容量最大化和去耦网络自感最小化,未充分利用PCB自身和去耦电容,限制了去耦网络的性能;通过优化PCB层叠设计和直接在焊盘上过孔,增大了去耦网络容量,减小了去耦网络的自感,同时有利于紧凑化布局。仿真结果表明,优化后的去耦网络性能得到提升,PCB的电源完整性(PI)得到满足。
The paper analyzes PCB decoupling network based on high frequency impedance and instantaneous energy transfer, points out that the conventional design method can not maximize the decoupling capacity and minimize the self-inductance of the decoupling network, and does not make full use of the PCB itself and the decoupling capacitor , Which limits the performance of the decoupling network. By optimizing the PCB stack design and directly over-hole in the pad, the decoupling network capacity is increased, the self-inductance of the decoupling network is reduced, and the layout is facilitated. The simulation results show that the performance of the decoupling network is improved and the power integrity (PI) of the PCB is satisfied.