用两维空间模拟和电荷控制原面来揭示决定I~2L最小延迟的因素,并且用实验进行了验证。本文采用数值分析说明:改善I~2L速度的重要因素是减小n-p-n晶体管外基区中的少数载流子存贮电荷以及采用重掺杂的发射区。因此,必须尽可能高地增加外基区浓度并精确控制其扩散深度。如摸拟所予期的那样,我们已经使速度提高了一倍。重掺杂外基区提高了向上电流增益并减小了基区电阻,从而获得高的扇出能力。 Two-dimensional space simulation and charge control of the original surface to reveal the factors that determine the minimum delay of 1-2L were performed and verified experimentally. In this paper, numerical analysis shows that the important factors to improve the speed of I ~ 2L are to reduce the minority charge carriers stored in the base region outside the n-p-n transistor and to use highly doped emitter regions. Therefore, it is necessary to increase the outer base concentration as much as possible and to precisely control its diffusion depth. We've doubled the speed as the simulation did. The heavily doped outer base region increases the upward current gain and reduces the base resistance, resulting in high fan-out capability.