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提出了一种采用现场可编程门阵列器件(FPGA)并利用窗函数法实现线性FIR数字滤波器的设计方案,并以一个十六阶低通FIR数字滤波器电路的实现为例说明了利用Xilinx公司的Virtex-E系列芯片的设计过程。对于在FPGA中实现FIR滤波器的关键———乘加运算,给出了将乘加运算转化为查找表的分布式算法。设计的电路通过软件进行了验证并进行了硬件仿真,结果表明:电路工作正确可靠,能满足设计要求。
A design scheme of a linear FIR digital filter based on field programmable gate array (FPGA) and window function method is proposed. The implementation of a 16th-order low-pass FIR digital filter circuit is taken as an example to illustrate the use of Xilinx The company’s Virtex-E series chip design process. For the realization of the FIR filter in FPGA FPGA --- multiply and add operations, given the multiplication and addition operations are converted to a lookup table distributed algorithm. The designed circuit is verified by software and the hardware simulation is carried out. The result shows that the circuit works correctly and reliably and can meet the design requirements.