2006年3月在美国加州Monterey举行的Globalpress电子峰会上,赛灵思(xilinx)展出了首款65nmFPGA,2006年下半年量产。65nmVirtex系列FP GA采用11层金属、CMOS工艺、第二代三栅极氧化层技术,其栅极长度40nm,氧化层厚度1.6nm,相当于5个原子层厚度;还采用镍硅化物的栅堆叠结构自对准 At the Globalpress Electronics Summit in March 2006 in Monterey, Calif., Xilinx exhibited its first 65nm FPGA with production available in the second half of 2006. The 65nm Virtex Series FP GA features a 11-metal, CMOS process and a second-generation triple-oxide technology with a gate length of 40nm and an oxide thickness of 1.6nm, equivalent to five atomic layer thicknesses; a nickel-silicide gate stack Structure self-alignment