模乘器的面积过大和速度较慢是影响公钥密码体制 RSA在智能卡应用中的主要问题。文中针对 Montgomery模乘算法进行了分析和改进 ,提出了一种新的适合于智能卡应用的高基模乘器结构。由于模乘器采用两个并行 16bit乘法器和两个流水的加法器 ,使得它有效地降低了芯片面积、提高了运算速度 ,从而实现了智能卡公钥密码体制 RSA的数字签名与认证。仿真表明 :在基于华邦 0 .5μm工艺下 ,模乘器 VLSI实现共用 85 0 0个门 ,在 2 0 MHz的时钟频率下 ,加密 10 2 4bit的数据模幂乘运算平均时间仅需 3 42 ms。这个指标优于当今电子商务的加密处理器 ,适合于智能卡应用 The area of ​​the modulo multiplier and the slow speed are the major problems affecting the application of RSA in smart card applications. In this paper, Montgomery modular multiplication algorithm is analyzed and improved, and a new high-modulus modular multiplier structure suitable for smart card applications is proposed. Because the modular multiplier uses two parallel 16bit multipliers and two pipelined adders, it can effectively reduce the chip area and increase the computing speed, so as to realize the digital signature and authentication of the smart card public key cryptosystem RSA. The simulation results show that the modulo multiplier VLSI achieves a total of 8500 gates under Winbond 0.5μm process. The average of the modular exponentiation of 1024bit data at the clock frequency of 20MHz is only 42% ms. This indicator is superior to today’s e-commerce encryption processor, suitable for smart card applications