论文部分内容阅读
采用SMIC 40nm CMOS工艺,设计了一种带预加重结构的低压差分(LVDS)发送器。低压差分驱动器采用双运放反馈控制电路,可稳定输出信号的摆幅。采用边沿检测电流注入的预加重电路,对输出进行高频预加重,克服了数据高速传输中高频信号的损失。该发送器的速率为6.25Gb/s,输出差分信号摆幅为300mV,预加重比例为3.5dB,功耗为7.1mW。该低压差分发送器可应用于高速IO物理层电路中。
Using a SMIC 40nm CMOS process, a low voltage differential (LVDS) transmitter with pre-emphasis was designed. Low-voltage differential driver dual op amp feedback control circuit, the output signal can be stable swing. Using edge detection current injection pre-emphasis circuit, the output of high-frequency pre-emphasis, to overcome the high-speed data transmission loss of high-frequency signals. The transmitter at a rate of 6.25Gb / s, the output differential signal swing of 300mV, pre-emphasis ratio of 3.5dB, power consumption of 7.1mW. The low-voltage differential transmitter can be applied to high-speed IO physical layer circuits.