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提出了一种使用新的编译器产生工具YAY来编写VHDL语法分析器的方法，实践证明，用这种方法设计的语法分析器完全解决了VHDL中歧义文法的问题而且其对应的代码效率较高，可读性较好。
A new compiler generation tool YAY is proposed to write a VHDL parser. Practice has proved that the parser designed by this method completely solves the problem of ambiguous grammar in VHDL and its corresponding code efficiency is high Readability is better.