A two-stage monolithic microwave integrated circuit(MMIC) low noise amplifier(LNA) fabricated in0.5 m Ga As p HEMT is presented. The Miller effect introduced by the parasitic gate–drain capacitance is utilized to decrease the value of the input inductor. Additionally, the input on-chip inductor is a novel high Q gradual structure.The noise figure is reduced with these two methods. With good input and output matching, the LNA achieves a noise figure of 0.75 d B and a small signal gain of 32.7 d B over 698–806 MHz. The input 1 d B compression point is –21.8 d Bm and the input third order interception point is –10 d Bm. The two-stage monolithic microwave integrated circuit (MMIC) low noise amplifier (LNA) fabricated in 0.5 m Ga As p HEMT is presented. The Miller effect introduced by the parasitic gate-drain capacitance is utilized to decrease the value of the input inductor ., The input on-chip inductor is a novel high Q gradual structure. The noise figure is reduced with these two methods. With good input and output matching, the LNA achieves a noise figure of 0.75 d B and a small signal gain of 32.7 d B over 698-806 MHz. The input 1 d B compression point is -21.8 d Bm and the input third order interception point is -10 d Bm.