The inteational technology roadmap for semiconductors (ITRSs) suggests that the shrinkage of dimensions of CMOS devices would also require reducing the vertical dimensions.[1] Ultra-shallow junction formation by ion implantation for CMOS transistors is one of the most important challenges because doping with n-and p-type dopants causes technological problems such as channeling and transient enhanced diffusion (TED).[2] The implantation of ion species heavier than boron such as indium has recently gained new interest because of controllability on its doping amount and positioning,[3] for the realization of shallower and steeper doping profiles,and achieving punch through suppression and threshold voltage control.