提出了一种高带宽的硅基CMOS雪崩光电二极管(APD)器件。该器件在N阱/P衬底基本结构的基础上,增加一个N型深掩埋层,并在该掩埋层单独加上电压,以减小载流子的输运时间。通过理论分析确定了器件的结构参数,通过器件性能的仿真分析对相关参数进行了优化设计。仿真结果表明:采用标准0.18μm CMOS工艺,所设计的APD器件的窗口尺寸大小为20μm×20μm,在反向偏压为16.3 V时,器件的雪崩增益为20,响应度为0.47 A/W,3 d B带宽为8.6 GHz。 A high bandwidth silicon avalanche photodiode (APD) device is proposed. Based on the basic structure of N-well / P substrate, an N-type deep buried layer is added to the device, and a voltage is applied to the buried layer to reduce carrier transport time. Through the theoretical analysis, the structural parameters of the device are determined, and the relevant parameters are optimized through the simulation analysis of the device performance. The simulation results show that the APD device has a window size of 20μm × 20μm with a standard 0.18μm CMOS process and an avalanche gain of 20 with a responsivity of 0.47 A / W with a reverse bias of 16.3 V. 3 d B bandwidth is 8.6 GHz.