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电平转换器可以作为1.1 V核心电压和3.3 V输入输出电压之间的高速接口。优化的电压上升转换器使用2.5 V厚氧化层栅零阈值电压n MOS管保护1.1 V薄氧化层栅n MOS器件,在输入电压低至0.7 V时仍可正常工作;此外,在六种不同工作情况下电路性能良好。3.3 V n MOS器件作为优化电平下降转换器的上拉和下拉器件,它们的供电电压是1.1 V,栅压范围从0 V到3.3 V。电平下降转换器没有最小核心电压限制,上升传输延时0.111 ns,下降传输延时0.121 ns。电平转换器经过结构优化后,可以成功应用到40 nm CMOS工艺的I/O库的输入输出单元中,作为低功耗、高速接口。
The level shifter acts as a high-speed interface between the 1.1 V core voltage and the 3.3 V input and output voltage. Optimized voltage rise converter uses a 2.5 V thick oxide gate Zero threshold voltage n MOS tube protection 1.1 V thin oxide gate n MOS device can still operate normally when the input voltage is as low as 0.7 V; in addition, in six different jobs The circuit performance is good. 3.3 V n MOS Devices As the pull-up and pull-down devices for optimizing the level down converter, they supply voltages of 1.1 V and gate voltages from 0 V to 3.3 V. The level-down converter has no minimum core voltage limit, rising propagation delay of 0.111 ns and falling propagation delay of 0.121 ns. The level shifter is structurally optimized for successful use as a low-power, high-speed interface in I / O bank I / O cells in a 40 nm CMOS process.