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以ZnO纳米棒阵列作为核,通过电化学沉积方法成功制备了致密的单壳层或者双壳层ZnO/CdTe/CdSe,ZnO/CdTe和ZnO/CdSe纳米电缆阵列光电极。对于ZnO/CdSe/CdTe纳米电缆阵列,有序且具有闪锌矿结构的CdSe和CdTe纳米壳层的厚度分别为10-20nm和7-15nm,两者之间形成了连续致密的界面层。利用未接触之前体材料之间的能带偏移和接触之后费米能级的调整,对于双壳层纳米电缆阵列,推导出在CdSe/CdTe和CdTe/CdSe界面的能级调校。对比在ZnO/CdTe/CdSe纳米电缆中CdTe/CdSe界面之间形成的负能带偏压-0.16eV,对于ZnO/CdSe/CdTe纳米电缆,CdTe的能带在CdSe的能带之上,因而在CdSe/CdTe界面之间成了0.16eV的正导带偏压。这样一个阶梯式的能带排列以及质密的界面接触,不仅使纳米电缆沿着径2向具有很少的晶界,同时沿轴向电子传输速率得到加快。因此,在45mW/cm的AM1.5G模拟光照2下,ZnO/CdSe/CdTe纳米电缆阵列光电极的饱和光电流密度高达~14.3mA/cm,明显高于ZnO/CdTe/CdSe,ZnO/CdSe和ZnO/CdTe纳米电缆阵列。
ZnO / CdTe / CdSe, ZnO / CdTe and ZnO / CdSe nanocable arrays photoelectrodes were successfully prepared by electrochemical deposition of ZnO nanorod arrays. For the ZnO / CdSe / CdTe nanowire arrays, the ordered and sphalerite-structured CdSe and CdTe nanoshells have thicknesses of 10-20 nm and 7-15 nm, respectively, forming a continuous and dense interfacial layer. Using the adjustment of the Fermi level after band offset and contact between the un-contacted precursor materials, the energy levels at the CdSe / CdTe and CdTe / CdSe interfaces were deduced for the bilayer nano-cable array. In contrast to the negative band-bias of -0.16eV formed at the CdTe / CdSe interface in ZnO / CdTe / CdSe nanowires, the energy band of CdTe is above the CdSe band for ZnO / CdSe / CdTe nanowires, A positive lead bias of 0.16eV has been achieved between the CdSe / CdTe interfaces. Such a stepped ribbon alignment and a dense interface contact not only allows nanowires to have few grain boundaries along radius 2, but also accelerates the electron transport rate in the axial direction. Therefore, the saturation photocurrent density of ZnO / CdSe / CdTe nanowire arrays photoelectrode was as high as ~ 14.3mA / cm under 45mW / cm AM1.5G simulated illumination 2, which was significantly higher than that of ZnO / CdTe / CdSe, ZnO / CdSe and ZnO / CdTe nanowire arrays.