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对静电放电(ESD)测试所得到的失效样品进行了物理失效分析,采用塑封体背面研磨、光发射显微镜(EMMI)从背面抓取热点的方法进行异常现象定位,通过剥层技术查找发生在金属化系统及器件层的各种缺陷,定位发生ESD失效的具体位置,进一步研究ESD失效机理。结果表明:0.13μm硅工艺IC产品芯片ESD失效可发生在任一输入/输出(I/O)管脚与地/电源之间;失效模式主要为金属熔融、介质击穿和MOS管过流烧毁;失效原因为静电压导致I/O与地(GND)之间的ESD保护电路NMOS管漏端击穿烧毁引起大电流,造成金属局部发热达到Al的熔点发生熔融而致短路,I/O与电源之间的过电压造成GND的焊盘发生电压击穿现象。
Physical failure analysis was conducted on the failure samples obtained from the ESD test. Abnormal phenomenon was detected by plastic backside grinding and EMEM from the backside of hot spots. System and device layer of various defects, locate the specific location of the occurrence of ESD failure, to further study the mechanism of ESD failure. The results show that the ESD failure of 0.13μm silicon IC chip can occur between any input / output (I / O) pin and ground / power supply. The failure modes are mainly metal melting, dielectric breakdown and MOS tube overcurrent burnout. Failure due to static voltage causes ESD protection circuit between I / O and ground (GND) NMOS transistor leakage breakdown breakdown caused by a large current, causing the metal to heat up to the melting point of Al melting caused short circuit, I / O and power Overvoltage between GND pads causes a voltage breakdown.