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简要地从RapidIO的主要技术特点、体系结构、系统拓扑、协议层次和流量控制等方面对其进行分析,提出了一种基于RapidIO总线的组合导航系统的架构方案.通过指定高性能包交换互连技术,在系统内的微处理器、DSP、FPGA、通信和网络处理器以及外设之间进行数据和控制信息传输,RapidIO架构消除了传统共享总线的瓶颈问题,极大地提高了系统整体性能.“,”The key characteristics of RapidIO such as system architecture, system topology, protocol hierarchy and flow-control are explicated. A framework of the integrated navigation system, which uses the RapidIO interconnect technology, is finally proposed. The RapidlO architecture is used to ease the interconnect bottleneck that current bus technology has encountered by defining a high-performance, packet-switched, interconnect technology designed for transferring data and control information among microprocessors, DSPs, FPGAs, communication and network processors, and peripheral devices of a system. The overall performance for integrated navigation systems can be improved greatly.