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为了提高传统移位寄存器的可靠性和耐辐射性,提出抗单粒子翻转(SEU)的高可靠移位寄存器.该设计基于TSMC 0.18μm 1.8V1P5M工艺,利用双边复位、位线分离和三模冗余技术,设计双边上电复位(POR)和SEU加固双互锁存储单元(DICE)结构.从原理图和版图两个层面,对传统移位寄存器结构进行全面SEU加固.为了模拟单粒子效应,在电路敏感节点注入不同线性能量传输(LET)的瞬态电流脉冲,利用Spectre仿真器及BSIM3v3物理模型,结合瞬态电路分析理论,对所设计的移位寄存器进行抗单粒子翻转性能仿真验证.仿真结果表明,提出的双边复位POR和SEU加固DICE电路在LET为100MeV·cm2/mg时不发生翻转.与传统的移位寄存器相比,设计的移位寄存器的抗单粒子翻转能力有显著的提高,具备高可靠性和辐射耐受性,可以用于航天领域的CMOS芯片设计.
In order to improve the reliability and radiation resistance of the traditional shift register, a highly reliable shift register with single event inversion (SEU) is proposed.The design is based on the TSMC 0.18μm 1.8V1P5M process and utilizes double-edge reset, bitline separation and three-mode redundancy (POR) and SEU reinforced Double Interlocking Memory Cell (DICE) structure, a full SEU reinforcement of the traditional shift register structure is implemented in both the schematic and the layout.In order to simulate the single-particle effect, Transient current pulses with different linear energy transfer (LET) are injected into the circuit sensitive nodes. The specter simulator and BSIM3v3 physical model are used in combination with the theory of transient circuit analysis to simulate the design of the shift register against the single-particle flip performance. The simulation results show that the proposed double-side reset POR and SEU-reinforced DICE circuits do not flip when the LET is 100 MeV · cm2 / mg.Compared with the traditional shift register, the design of the shift register has significant anti-single-particle flipping ability Improve, with high reliability and radiation tolerance, can be used in aerospace CMOS chip design.