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采用SMIC 0.18μm RF CMOS工艺,设计了一种高线性度、低噪声下变频混频器。通过分析跨导级电流3阶展开项系数,优化跨导级偏置电压,在跨导级与开关级之间增加谐振频率为射频信号频率的LC并联谐振电路,在提高电路线性度的同时优化了信噪比。后仿真结果表明,在射频频率为1.575GHz,本振频率为1.571GHz,中频频率为4 MHz时,本振功率为0dBm,电压转换增益为19.22dB,输入3阶交调点为21.93dBm,单边带噪声系数为11.74dB。混频器工作电压为1.8V,功耗为3.66mW,核心电路版图面积为0.207 5mm~2。
A SMIC 0.18μm RF CMOS process is used to design a high linearity and low noise downconversion mixer. By analyzing the third-order expansion coefficient of the transconductance current and optimizing the transconductance bias voltage, an LC parallel resonant circuit whose resonant frequency is the frequency of the radio frequency signal is added between the transconductance stage and the switching stage to optimize the linearity of the circuit while improving the circuit linearity The signal to noise ratio. The simulation results show that the local oscillator power is 0dBm, the voltage conversion gain is 19.22dB, the input 3rd order intermodulation point is 21.93dBm at the frequency of 1.575GHz, the local oscillation frequency is 1.571GHz and the intermediate frequency is 4MHz. The sideband noise figure is 11.74dB. Mixer voltage is 1.8V, power consumption is 3.66mW, the core circuit layout area of 0.207 5mm ~ 2.