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在开展综合信息系统演示试验前,为了实现激光通信系统的单独测试,需对模拟的各种载荷选择性输出及对误码率进行测试。研制了一种基于FPGA的嵌入式智能多路器及高速伪随机序列生成器,设计高速并串转换电路及时钟电路实现高速伪随机序列的传输,速度可达3 Gbps,用于误码率测试。其中高速的伪随机序列速率智能可调,速率范围为750 M到3 G。设计兼容多种电平的差分多路器,数据传输的类型通过多路器选择性输出,输出的电平为固定的LVPECL。如:视音频的串行数据流,伪随机序列,模拟数据源。
Before carrying out the demonstration of the integrated information system, in order to realize the separate test of the laser communication system, the output of the simulated various loads and the bit error rate must be tested. A kind of embedded intelligent multiplexer and high-speed pseudo-random sequence generator based on FPGA is developed. High-speed parallel-serial conversion circuit and clock circuit are designed to transmit high-speed pseudo-random sequence with the speed of up to 3 Gbps for bit error rate testing . One of the high-speed pseudo-random sequence rate of intelligent adjustable, the rate range of 750 M to 3 G. Design compatible multi-level differential multiplexer, the type of data transmission through the multiplexer selective output, the output level is fixed LVPECL. Such as: video and audio serial data stream, pseudo-random sequence, analog data source.