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设计了一种全差分高速高增益的CMOS运算跨导放大器。该放大器采用了折叠式共源共栅结构,并用增益自举技术提高运算放大器的直流增益。为了实现较大的输出电压摆幅和较低的电路直流功耗,主运放采用了开关电容共模反馈。该放大器可用于10位50MHz的流水线ADC电路中。基于CSMC0.5工艺库,电源电压3.3V,仿真结果表明,在5p的负载电容下,运算放大器的增益为106dB,单位增益带宽为371MHz。
A fully differential high-speed, high-gain CMOS transconductance amplifier is designed. The amplifier uses a folded cascode structure and boosts the dc gain of the op amp with a gain bootstrap technique. In order to achieve a larger output voltage swing and lower the circuit DC power consumption, the main op amp uses a switched capacitor common mode feedback. This amplifier can be used in a 10-bit 50MHz pipeline ADC circuit. Based on the CSMC0.5 technology library, the power supply voltage is 3.3V. The simulation results show that the gain of the op amp is 106dB and the unity gain bandwidth is 371MHz under 5p load capacitance.